IEEE - Institute of Electrical and Electronics Engineers, Inc. - Supplementary symmetrical logic circuit structure

Proceedings of the 29th International Symposium on Multiple-Valued Logic

Author(s): Olson, E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Freiburg, Germany, Germany
Conference Date: 20 May 1999
Page(s): 42 - 47
ISBN (Paper): 0-7695-0161-3
ISSN (Paper): 0195-623X
DOI: 10.1109/ISMVL.1999.779693
Regular:

The Supplementary Symmetrical Logic Circuit Structure (SUS-LOC) is a fully active, self sustaining architecture intended primarily for the design and fabrication of logic synthesizing circuits... View More

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