IEEE - Institute of Electrical and Electronics Engineers, Inc. - System level virtual prototyping of DSP ASICs using grammar based approach

Proceedings of RSP'99: 10th IEEE International Workshop on Rapid System Prototyping

Author(s): Hemani, A. ; Oberg, J. ; Deb, A.K. ; Lindqvist, D. ; Fjellborg, B.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Clearwater, FL, USA, USA
Conference Date: 16 June 1999
Page(s): 166 - 171
ISBN (Paper): 0-7695-0246-6
DOI: 10.1109/IWRSP.1999.779048
Regular:

DSP systems are often modeled using functional and bit-true level simulators, where it is not possible to validate the system level timing, control and configuration (SLTCC) of the product. In... View More

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