IEEE - Institute of Electrical and Electronics Engineers, Inc. - Extraction of the trap density at the gate periphery using the gated diode array for giga-bit DRAMs

Proceedings of International Conference on Microelectronic Test Structures

Author(s): Suzuki, H. ; Kojima, M. ; Nara, Y.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Goteborg, Sweden, Sweden
Conference Date: 15 March 1999
Page(s): 121 - 124
ISBN (Paper): 0-7803-5270-X
DOI: 10.1109/ICMTS.1999.766228
Regular:

Gated diode arrays which have varied peripheral length around the gates are proposed to evaluate the leakage current at the gate periphery of deep sub-micron devices. Due to the high electric... View More

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