IEEE - Institute of Electrical and Electronics Engineers, Inc. - Measurement of N-well sheet resistance under p/sup +/ diffusion and p channel gate

Proceedings of International Conference on Microelectronic Test Structures

Author(s): Ashton, R.A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Goteborg, Sweden, Sweden
Conference Date: 15 March 1999
Page(s): 45 - 50
ISBN (Paper): 0-7803-5270-X
DOI: 10.1109/ICMTS.1999.766214
Regular:

Van der Pauw test structures for the measurement of N-well sheet resistance under p/sup +/ diffusion and under p channel gate for CMOS technologies on p substrates are presented.

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