IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 18 /spl mu/A-standby-current 1.8 V 200 MHz microprocessor with self substrate-biased data-retention mode

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition

Author(s): H. Mizuno ; K. Ishibashi ; T. Shimura ; T. Hattori ; S. Narita ; K. Shiozawa ; S. Ikeda ; K. Uchiyama
Sponsor(s): IEEE Solid State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: San Francisco, CA, USA
Conference Date: 17 February 1999
Page Count: 3
Page(s): 280 - 281
ISBN (Paper): 0-7803-5126-6
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.1999.759250
Regular:

A 1.8 V 200 MHz low-subthreshold-leakage-current microprocessor is fabricated in a 0.2 /spl mu/m CMOS technology. It uses a switched substrate-impedance scheme to bias substrates while... View More

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