IEEE - Institute of Electrical and Electronics Engineers, Inc. - Low-skew clock generator with dynamic impedance and delay matching

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition

Author(s): A. Balatsos ; D. Lewis
Sponsor(s): IEEE Solid State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: San Francisco, CA, USA
Conference Date: 17 February 1999
Page Count: 3
Page(s): 182 - 183
ISBN (Paper): 0-7803-5126-6
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.1999.759183
Regular:

High-speed digital systems on printed circuit boards require low-skew system clock distribution. Previous approaches track fabrication variations in the PC board, but use two traces for each clock... View More

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