IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 14 b 150 Msample/s update rate Q/sup 2/ random walk CMOS DAC

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition

Author(s): J. Vandenbussche ; G. Van der Plas ; A. Van den Bosch ; W. Daems ; G. Gielen ; M. Steyaert ; W. Sansen
Sponsor(s): IEEE Solid State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: San Francisco, CA, USA
Conference Date: 17 February 1999
Page Count: 2
Page(s): 146 - 147
ISBN (Paper): 0-7803-5126-6
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.1999.759167
Regular:

Current steering DACs are based on an array of matched current cells organized in unary decoded or binary weighted elements. The segmented architecture is most frequently used to combine high... View More

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