IEEE - Institute of Electrical and Electronics Engineers, Inc. - Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings

Author(s): Fournier, L. ; Arbetman, Y. ; Levinger, M.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Munich, Germany, Germany
Conference Date: 9 March 1999
Page(s): 434 - 441
ISBN (Paper): 0-7695-0078-1
DOI: 10.1109/DATE.1999.761162
Regular:

Even though the importance of microprocessor design verification is widely acknowledged, no rigorous methodology is being commonly followed for its realization. This paper attempts to delineate... View More

Advertisement