IEEE - Institute of Electrical and Electronics Engineers, Inc. - A VLSI architecture for ATM algorithm-agile encryption

Proceedings Ninth Great Lakes Symposium on VLSI

Author(s): Wassal, A.G. ; Hasan, M.A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Ypsilanti, MI, USA, USA
Conference Date: 4 March 1999
Page(s): 325 - 328
ISBN (Paper): 0-7695-0104-4
ISSN (Paper): 1066-1395
DOI: 10.1109/GLSV.1999.757444
Regular:

In this paper a VLSI architecture is proposed for an algorithm-agile encryptor for ATM networks. The architecture is based on a circular sorting queue that buffers and switches incoming cells to... View More

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