IEEE - Institute of Electrical and Electronics Engineers, Inc. - Transistor level synthesis for static CMOS combinational circuits

Proceedings Ninth Great Lakes Symposium on VLSI

Author(s): Liu, C.-P.L. ; Abraham, J.A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Ypsilanti, MI, USA, USA
Conference Date: 4 March 1999
Page(s): 172 - 175
ISBN (Paper): 0-7695-0104-4
ISSN (Paper): 1066-1395
DOI: 10.1109/GLSV.1999.757403
Regular:

This paper introduces a novel framework to synthesize static CMOS circuits at the transistor level. A new class of binary decision diagrams (BDDs) which represent inverting Boolean functions,... View More

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