IEEE - Institute of Electrical and Electronics Engineers, Inc. - An integrated approach for synthesizing LUT networks

Proceedings Ninth Great Lakes Symposium on VLSI

Author(s): Yamashita, S. ; Sawada, H. ; Nagoya, A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Ypsilanti, MI, USA, USA
Conference Date: 4 March 1999
Page(s): 136 - 139
ISBN (Paper): 0-7695-0104-4
ISSN (Paper): 1066-1395
DOI: 10.1109/GLSV.1999.757395
Regular:

This paper presents a method for synthesizing lookup table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many decomposition methods... View More

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