IEEE - Institute of Electrical and Electronics Engineers, Inc. - ICE: incremental 3-dimensional capacitance and resistance extraction for an iterative design environment

Proceedings Ninth Great Lakes Symposium on VLSI

Author(s): Yanhong Yuan ; Banerjee, P.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Ypsilanti, MI, USA, USA
Conference Date: 4 March 1999
Page(s): 64 - 67
ISBN (Paper): 0-7695-0104-4
ISSN (Paper): 1066-1395
DOI: 10.1109/GLSV.1999.757378
Regular:

In this paper we discuss the 3-Dimensional (3-D) capacitance and resistance extraction within an iterative design environment, where small changes are made to the 3-D structures. We present a... View More

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