IEEE - Institute of Electrical and Electronics Engineers, Inc. - Theoretical analysis of word-level switching activity in the presence of glitching and correlation

Proceedings Ninth Great Lakes Symposium on VLSI

Author(s): Satyanarayana, J.H. ; Parhi, K.K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Ypsilanti, MI, USA, USA
Conference Date: 4 March 1999
Page(s): 46 - 49
ISBN (Paper): 0-7695-0104-4
ISSN (Paper): 1066-1395
DOI: 10.1109/GLSV.1999.757374
Regular:

This paper presents a novel analytical approach to complete the switching activity in digital circuits at the word-level in the presence of glitching and correlation. The proposed approach makes... View More

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