IEEE - Institute of Electrical and Electronics Engineers, Inc. - Clock-powered CMOS: a hybrid adiabatic logic style for energy-efficient computing

Proceedings 20th Anniversary Conference on Advanced Research in VLSI

Author(s): Tzartzanis, N. ; Athas, W.C.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Atlanta, GA, USA, USA
Conference Date: 21 March 1999
Page(s): 137 - 151
ISBN (Paper): 0-7695-0056-0
ISSN (Paper): 1522-869X
DOI: 10.1109/ARVLSI.1999.756044
Regular:

Clock-powered logic is a new CMOS logic style which combines adiabatic switching and energy recovery-techniques with conventional CMOS logic styles for the design of low-power computing... View More

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