IEEE - Institute of Electrical and Electronics Engineers, Inc. - How to half the latency of IEEE compliant floating-point multiplication

Proceedings 24th EUROMICRO Conference

Author(s): Seidel, P.-M.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1998
Conference Location: Vasteras, Sweden, Sweden
Conference Date: 27 August 1998
Volume: 1
ISBN (Paper): 0-8186-8646-4
ISSN (Paper): 1089-6503
DOI: 10.1109/EURMIC.1998.711821
Regular:

We present an IEEE compliant floating-point multiplier that computes the correctly rounded result for all representable floating-point values. This multiplier can be implemented in 2 clock cycles,... View More

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