IEEE - Institute of Electrical and Electronics Engineers, Inc. - High performance 20-30 V LDMOS transistors in a 0.65 /spl mu/m-based BiCMOS compatible process

Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting

Author(s): Merchant, S. ; Baird, R. ; Hui, P. ; Thoma, R. ; Victory, J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Minneapolis, MN, USA
Conference Date: 28 September 1997
Page(s): 202 - 205
ISBN (Paper): 0-7803-3916-9
ISSN (Paper): 1088-9299
DOI: 10.1109/BIPOL.1997.647436
Regular:

A 5th generation SMARTMOS/sup TM/ 0.65 /spl mu/m BiCMOS technology geared for advanced power applications yields the lowest specific on-resistance reported to date for the 20-30 V breakdown... View More

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