IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.7 /spl mu/m linear BiCMOS/DMOS technology for mixed-signal/power applications

Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting

Author(s): Smith, J. ; Tessmer, A. ; Springer, L. ; Madhani, P. ; Erdeljac, J. ; Mitros, J. ; Efland, T. ; Chin-Yu Tsai ; Pendharkar, S. ; Hutter, L.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Minneapolis, MN, USA
Conference Date: 28 September 1997
Page(s): 155 - 157
ISBN (Paper): 0-7803-3916-9
ISSN (Paper): 1088-9299
DOI: 10.1109/BIPOL.1997.647424
Regular:

A 0.7 /spl mu/m BiCMOS technology is described. The baseline process offers digital and analog CMOS, a variety of bipolar devices, poly resistors, poly-poly capacitors, Schottky diodes, noise... View More

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