IEEE - Institute of Electrical and Electronics Engineers, Inc. - A new high-performance CMOS-compatible reduced-area bipolar transistor

Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting

Author(s): Emons, C.H.H. ; Hurloc, G.A.M. ; Pijpers, H.E.J. ; Peter, M.S. ; Koster, R. ; Slotboom, J.W.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Minneapolis, MN, USA
Conference Date: 28 September 1997
Page(s): 44 - 47
ISBN (Paper): 0-7803-3916-9
ISSN (Paper): 1088-9299
DOI: 10.1109/BIPOL.1997.647352
Regular:

A CMOS-compatible single-poly bipolar transistor with implanted collector and minimised emitter-collector distance has been fabricated and characterised. This new concept features good transistor... View More

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