IEEE - Institute of Electrical and Electronics Engineers, Inc. - A test processor chip implementing multiple seed, multiple polynomial linear feedback shift register

Proceedings Sixth Asian Test Symposium (ATS'97)

Author(s): Darus, Z.M. ; Ahmed, I. ; Ali, L.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Akita, Japan, Japan
Conference Date: 17 November 1997
Page(s): 155 - 160
ISBN (Paper): 0-8186-8209-4
ISSN (Paper): 1081-7735
DOI: 10.1109/ATS.1997.643952
Regular:

This paper presents the design of a low cost, test processor ASIC chip implementing multiple seed, multiple polynomial linear feedback shift register (MPMSLFSR). User programmable seed and... View More

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