IEEE - Institute of Electrical and Electronics Engineers, Inc. - An effective fault simulation method for core based LSI

Proceedings Sixth Asian Test Symposium (ATS'97)

Author(s): Yoshida, T. ; Shimoda, R. ; Mizokawa, T. ; Hirayama, K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Akita, Japan, Japan
Conference Date: 17 November 1997
Page(s): 116 - 121
ISBN (Paper): 0-8186-8209-4
ISSN (Paper): 1081-7735
DOI: 10.1109/ATS.1997.643945
Regular:

We examined effective usage of fault simulation to reduce enormous handling time for fault simulation, and applied it in our LSI development. Random sampling method, DFS (Distributed Fault... View More

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