IEEE - Institute of Electrical and Electronics Engineers, Inc. - Open fault detection method for CMOS-LSI by supplying pulsed voltage signal to VDD and GND lines

Proceedings of the 1997 6th International Symposium on the Physical and Failure Analysis of Integrated Circuits

Author(s): Sumitomo, H. ; Nakamura, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Singapore
Conference Date: 25 July 1997
Page(s): 68 - 73
ISBN (Paper): 0-7803-3985-1
DOI: 10.1109/IPFA.1997.638123
Regular:

An easy and rapid failure analysis method to detect CMOS-LSI open faults has been developed. This method exploits both the properties of CMOS structure and the voltage contrast image. By supplying... View More

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