IEEE - Institute of Electrical and Electronics Engineers, Inc. - Methodology for ULSI LOCOS isolation built-in reliability analysis

Proceedings of the 1997 6th International Symposium on the Physical and Failure Analysis of Integrated Circuits

Author(s): Loiko, K.V. ; Peidous, I.V. ; Hok-Min Ho ; Quek, E.K.B. ; Lim, D.H.Y.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Singapore
Conference Date: 25 July 1997
Page(s): 12 - 16
ISBN (Paper): 0-7803-3985-1
DOI: 10.1109/IPFA.1997.638065
Regular:

The results of studying the mechanisms of CMOS ULSI LOCOS isolation failures and an effective approach to qualifying the technological processes of isolation manufacturing are presented. The... View More

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