IEEE - Institute of Electrical and Electronics Engineers, Inc. - A one-transistor-synapse strategy for electrically-programmable massively-parallel analog array processors

1997 2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design

Author(s): Dominguez-Castro, R. ; Espejo, S. ; Rodriguez-Vazquez, A. ; Carmona, R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Baveno, Italy, Italy
Conference Date: 12 September 1997
Page(s): 117 - 122
ISBN (Paper): 0-7803-4240-2
DOI: 10.1109/AMICD.1997.637203
Regular:

This paper presents a linear, four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation of general massively-parallel analog processors in... View More

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