IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 256 Meg SDRAM BIST for disturb test application

Proceedings International Test Conference 1997

Author(s): Powell, T.J. ; Hii, F. ; Cline, D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Washington, DC, USA, USA
Conference Date: 6 November 1997
Page(s): 200 - 208
ISBN (Paper): 0-7803-4209-7
ISSN (Paper): 1089-3539
DOI: 10.1109/TEST.1997.639614
Regular:

The Disturb Test Algorithms are targeted for row adjacent coupled defects that can be time elapsed dependent. A BIST design is described for application of these tests for testing 256 Meg SDRAM... View More

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