IEEE - Institute of Electrical and Electronics Engineers, Inc. - 300 KG gate-array LSI using 0.25-/spl mu/m ultra-thin-film fully-depleted CMOS/SIMOX with tungsten-deposited source/drain

1997 IEEE International SOI Conference Proceedings

Author(s): Sato, Y. ; Kado, Y. ; Tsuchiya, T. ; Kosugi, T. ; Ishii, H. ; Nishimura, K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Fish Camp, CA, USA, USA
Conference Date: 6 October 1997
Page(s): 168 - 169
ISBN (Paper): 0-7803-3938-X
ISSN (Paper): 1078-621X
DOI: 10.1109/SOI.1997.634986
Regular:

Summary form only given. We fabricated a 300 kG gate-array LSI using 0.25 /spl mu/m ultra-thin-film fully-depleted (FD) CMOS/SIMOX technology with tungsten selective CVD (W-SCVD) to reduce S/D... View More

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