IEEE - Institute of Electrical and Electronics Engineers, Inc. - Survey of model reduction techniques for analysis of package and interconnect models of high-speed designs

Electrical Performance of Electronic Packaging

Author(s): Chiprout, E. ; Nguyen, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: San Jose, CA, USA, USA
Conference Date: 27 October 1997
Page(s): 251 - 254
ISBN (Paper): 0-7803-8649-3
DOI: 10.1109/EPEP.1997.634082
Regular:

An overview of the recent advances in model reduction techniques of linear interconnect and packaging models for the purpose of simulation is given. The importance of different methods for... View More

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