IEEE - Institute of Electrical and Electronics Engineers, Inc. - An attempt to explain thermally induced soft failures during low level ESD stresses: study of the differences between soft and hard NMOS failures.

Proceedings of 18th Annual Electrical Overstress/Electrostatic Discharge Symposium

Author(s): Salome, P. ; Leroux, C. ; Mariolle, D. ; Lafond, D. ; Chante, J.P. ; Crevel, P. ; Reimbold, G.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Santa Clara, California, USA, USA
Conference Date: 23 September 1997
Page(s): 337 - 345
ISBN (Paper): 1-878303-69-4
DOI: 10.1109/EOSESD.1997.634261
Regular:

This work focuses on the thermal soft failure mechanism happening in NMOS transistors during low level ESD stresses. Soft and Hard failure modes are both precisely characterized using Atomic-Force... View More

Advertisement