IEEE - Institute of Electrical and Electronics Engineers, Inc. - Simulation of logic/IDDQ tests for resistive shorts in logic circuits by using simplicial approximation

Digest of Papers IEEE International Workshop on IDDQ Testing

Author(s): Hung-Jen Lin ; L. Milor
Sponsor(s): IEEE Comput. Soc. Tech. Committee on Test Technol
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Washington, DC, USA, USA
Conference Date: 5 November 1997
Page Count: 4
Page(s): 114 - 117
ISBN (Paper): 0-8186-8123-3
DOI: 10.1109/IDDQ.1997.633024
Regular:

Logic circuits in the presence of resistive shorts often exhibit analog behavior which can be computationally expensive to simulate. This paper introduces a numerical method called simplicial... View More

Advertisement