IEEE - Institute of Electrical and Electronics Engineers, Inc. - I/sub DDQ/ testing of a 180 MHz HP PA-RISC microprocessor with redundancy programmed caches

Digest of Papers IEEE International Workshop on IDDQ Testing

Author(s): Meneghini, T. ; Josephson, D.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Washington, DC, USA, USA
Conference Date: 5 November 1997
Page(s): 44 - 51
ISBN (Paper): 0-8186-8123-3
DOI: 10.1109/IDDQ.1997.633012
Regular:

The Hewlett-Packard PA7300LC is a 180 MHz PA-RISC microprocessor consisting of 1.2 million core logic transistors and 8 million cache transistors. The design of the power distribution network for... View More

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