IEEE - Institute of Electrical and Electronics Engineers, Inc. - System to silicon path optimization

WESCON/97 Conference Proceedings

Author(s): King, C. ; O'Neill, M. ; Fuller, C.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Santa Clara, CA, USA
Conference Date: 6 November 1997
Page(s): 34 - 40
ISBN (Paper): 0-7803-4303-4
ISSN (Paper): 1095-791X
DOI: 10.1109/WESCON.1997.632316
Regular:

The gate densities offered by today's silicon technology are enabling designers to put entire systems on a chip. While there are many potential benefits to using this capability, there is also an... View More

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