IEEE - Institute of Electrical and Electronics Engineers, Inc. - Configurable structures for a primitive operator digital filter FPGA

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Arslan, T. ; Eskikurt, H.I. ; Horrocks, D.H.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 532 - 540
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626343
Regular:

A number of configurable arithmetic structures for an FPGA architecture for the realisation of low complexity digital filters are investigated. The FPGA is based upon primitive operator design... View More

Advertisement