IEEE - Institute of Electrical and Electronics Engineers, Inc. - A programmable VLC core architecture for video compression DSP

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Fukuzawa, Y. ; Hasegawa, K. ; Hanaki, H. ; Iwata, E. ; Yamazaki, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 469 - 478
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626321
Regular:

A programmable Variable-Length Coder/decoder, "VLC core", is developed for various video compression algorithms and standards. This paper describes the programmable architecture that allows the... View More

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