IEEE - Institute of Electrical and Electronics Engineers, Inc. - Multithreaded systolic/SIMD DSP array processor-MUS2DAP

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Sernec, R. ; Zajc, M. ; Tasic, J.F.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 448 - 457
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626309
Regular:

This paper deals with architectural design of the systolic/SIMD DSP processing array called MUS2DAP optimized for the execution of DSP filtering, vector/matrix and linear algebra algorithms. Its... View More

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