IEEE - Institute of Electrical and Electronics Engineers, Inc. - An efficient multiplierless FIR filter chip with variable-length taps

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Sung Hyun Yoon ; Sunwoo, M.H.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 412 - 420
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626279
Regular:

The paper proposes a novel VLSI architecture for a multiplierless FIR filter chip providing variable length taps. To change the number of taps, we propose two special features called a data reuse... View More

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