IEEE - Institute of Electrical and Electronics Engineers, Inc. - An efficient Reed-Solomon decoder VLSI with erasure correction

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Kyutaeg Oh ; Wonyong Sung
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 193 - 201
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626116
Regular:

A new architecture for implementing a Reed-Solomon error correction VLSI that utilizes the erasure information is developed. To reduce the number of arithmetic elements, we employed a serial... View More

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