IEEE - Institute of Electrical and Electronics Engineers, Inc. - Implementing area-time efficient VLSI residue to binary converters

1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing

Author(s): Srikanthan, T. ; Bhardwaj, M. ; Clarke, C.T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Leicester, UK, United Kingdom
Conference Date: 5 November 1997
Page(s): 163 - 172
ISBN (Paper): 0-7803-3806-5
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.1997.626113
Regular:

In this paper, the authors present highly area-time efficient VLSI implementations of residue reverse converters called Compressed Multiply ACcumulate (CMAC) converters. The efficiency results... View More

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