IEEE - Institute of Electrical and Electronics Engineers, Inc. - Statistically calculating reject limits at parametric test

Twenty First IEEE/CPMT International Electronics Manufacturing Technology Symposium Proceedings 1997 IEMT Symposium

Author(s): Michelson, D.K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Austin, TX, USA
Conference Date: 13 October 1997
Page(s): 172 - 177
ISBN (Paper): 0-7803-3929-0
ISSN (Paper): 1089-8190
DOI: 10.1109/IEMT.1997.626895
Regular:

Known Good Die (KGD) methodology is a process used in the manufacture of semiconductor chips which determines reject limits for parameters measured at sample probe. The philosophy of KGD is to set... View More

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