IEEE - Institute of Electrical and Electronics Engineers, Inc. - Using genetic algorithm for slicing floorplan area optimization in circuit design

1997 IEEE International Conference on Systems, Man, and Cybernetics. Computational Cybernetics and Simulation

Author(s): Mani, N. ; Srinivasan, B.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Orlando, FL, USA, USA
Conference Date: 12 October 1997
Volume: 3
ISBN (Paper): 0-7803-4053-1
ISSN (Paper): 1062-922X
DOI: 10.1109/ICSMC.1997.635433
Regular:

The paper describes a combined genetic algorithm and slicing approach for floorplan area optimization. This approach helps the designer to explore the floorplan issues during the early stage of... View More

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