IEEE - Institute of Electrical and Electronics Engineers, Inc. - Performance evaluation of an IC fabrication system using Petri nets

1997 IEEE International Conference on Systems, Man, and Cybernetics. Computational Cybernetics and Simulation

Author(s): Mu Der Jeng ; Shih Wei Chou ; Chi Liang Chung
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Orlando, FL, USA, USA
Conference Date: 12 October 1997
Volume: 1
ISBN (Paper): 0-7803-4053-1
ISSN (Paper): 1062-922X
DOI: 10.1109/ICSMC.1997.625761
Regular:

IC wafer fabrication is a multi-stage process with reentrant flows, including various operations such as photolithography, diffusion, etching, and thin film. A typical wafer undergoes hundreds of... View More

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