IEEE - Institute of Electrical and Electronics Engineers, Inc. - RTL based scan BIST

Proceedings VHDL International Users' Forum. Fall Conference

Author(s): Subrata, R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1997
Conference Location: Arlington, VA, USA, USA
Conference Date: 19 October 1997
Page(s): 117 - 121
ISBN (Paper): 0-8186-8180-2
DOI: 10.1109/VIUF.1997.623939
Regular:

The synthesis of ASICs from register transfer level (RTL) sources is often a bottom-up iterative process where the synthesis process is carefully controlled to produce a gate-level design which... View More

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