IEEE - Institute of Electrical and Electronics Engineers, Inc. - Limitations of VLSI implementation of delay-insensitive codes

Proceedings of Annual Symposium on Fault Tolerant Computing

Author(s): Akella, V. ; Vaidya, N.H. ; Redinbo, G.R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1996
Conference Location: Sendai, Japan, Japan
Conference Date: 25 June 1996
Page(s): 208 - 217
ISBN (Paper): 0-8186-7262-5
ISSN (Paper): 0731-3071
DOI: 10.1109/FTCS.1996.534608
Regular:

Implementation of delay-insensitive (DI) or unordered codes is the subject of this paper. We present two different architectures for decoding systematic DI codes: (a) an enumeration-based decoder,... View More

Advertisement