IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 336-kbit content addressable memory for highly parallel image processing

Proceedings of Custom Integrated Circuits Conference

Author(s): Ogura, T. ; Nakanishi, M. ; Baba, T. ; Nakabayashi, Y. ; Kasai, R.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1996
Conference Location: San Diego, CA, USA, USA
Conference Date: 5 May 1996
Page(s): 273 - 276
ISBN (Paper): 0-7803-3117-6
DOI: 10.1109/CICC.1996.510557
Regular:

This paper describes a 336-kbit (4 kwords/spl times/84 bits) Content Addressable Memory (CAM) LSI with dedicated functions for highly parallel image processing. This LSI can operate as a SIMD PE... View More

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