IEEE - Institute of Electrical and Electronics Engineers, Inc. - A high density embedded array programmable logic architecture

Proceedings of Custom Integrated Circuits Conference

Author(s): Reddy, S. ; Cliff, R. ; Jefferson, D. ; Lane, C. ; Sung, C.K. ; Wang, B. ; Huang, J. ; Wanli Chang ; Cope, T. ; McClintock, C. ; Leong, W. ; Ahanin, B. ; Turner, J.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1996
Conference Location: San Diego, CA, USA, USA
Conference Date: 5 May 1996
Page(s): 251 - 254
ISBN (Paper): 0-7803-3117-6
DOI: 10.1109/CICC.1996.510553
Regular:

An SRAM based embedded array programmable logic architecture with densities ranging from 10000 to 100000 gates is discussed in this paper. An embedded array is incorporated into this architecture... View More

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