IEEE - Institute of Electrical and Electronics Engineers, Inc. - A novel booster plate technology in high density NAND flash memories for voltage scaling-down and zero program disturbance

1996 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): J.D. Choi ; D.J. Kim ; J. Kim ; H.S. Kim ; W.C. Shin ; S.T. Ahn ; O.H. Kwon
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1996
Conference Location: Honolulu, HI, USA, USA
Conference Date: 11 June 1996
Page Count: 2
Page(s): 238 - 239
ISBN (Paper): 0-7803-3342-X
DOI: 10.1109/VLSIT.1996.507863
Regular:

The booster plate in NAND flash memory cells gives numerous advantages: the reduction of program, erase and pass voltages, zero program disturbance and increased cell current. At the same time, it... View More

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