IEEE - Institute of Electrical and Electronics Engineers, Inc. - 0.5 /spl mu/m 1 M gate CMOS SOG

Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93

Author(s): Ikeda, N. ; Ishibashi, A. ; Maeno, H. ; Matsue, S. ; Asahina, K. ; Arakawa, T. ; Kato, S.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: San Diego, CA, USA
Conference Date: 9 May 1993
ISBN (Paper): 0-7803-0826-3
DOI: 10.1109/CICC.1993.590755
Regular:

A one-million-gate CMOS SOG (sea-of-gates) array has been developed by using half-micron three-layer metal CMOS technology. The high speed I/O (input/output) buffers, RAM cell libraries, and clock... View More

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