IEEE - Institute of Electrical and Electronics Engineers, Inc. - Efficient modeling of switch-level networks containing undetermined logic node states

Proceedings of 1993 International Conference on Computer Aided Design (ICCAD)

Author(s): Dahlgren, P. ; Liden, P.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: Santa Clara, CA, USA, USA
Conference Date: 7 November 1993
Page(s): 746 - 752
ISBN (Paper): 0-8186-4490-7
DOI: 10.1109/ICCAD.1993.580172
Regular:

The presence of realistic faults in CMOS networks, such as shorts and opens, frequently gives rise to intermediate voltage values. At the switch level, these values result in undetermined logic... View More

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