IEEE - Institute of Electrical and Electronics Engineers, Inc. - Multiple-valued logic in FPGAs

Proceedings of 36th Midwest Symposium on Circuits and Systems

Author(s): Zilic, Z. ; Vranesic, Z.G.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: Detroit, MI, USA
Conference Date: 16 August 1993
ISBN (Paper): 0-7803-1760-2
DOI: 10.1109/MWSCAS.1993.343412
Regular:

This paper considers the applicability of multiple-valued logic (MVL) circuits in implementation of field-programmable gate arrays (FPGAs). It proposes an FPGA logic block architecture that... View More

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