IEEE - Institute of Electrical and Electronics Engineers, Inc. - Self-timed adder with pipelined output

Proceedings of 36th Midwest Symposium on Circuits and Systems

Author(s): Dhanesha, H. ; Albicki, A.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: Detroit, MI, USA
Conference Date: 16 August 1993
ISBN (Paper): 0-7803-1760-2
DOI: 10.1109/MWSCAS.1993.343203
Regular:

This paper presents the design of a self-timed adder, with event driven logic and pipelined output. The scheme makes the individual outputs of bit-wise additions independent of the preceding bits,... View More

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