IEEE - Institute of Electrical and Electronics Engineers, Inc. - A hardware cache coherency scheme for multiprocessors

Proceedings of 36th Midwest Symposium on Circuits and Systems

Author(s): Raja, P.V. ; Ganesan, S.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: Detroit, MI, USA
Conference Date: 16 August 1993
ISBN (Paper): 0-7803-1760-2
DOI: 10.1109/MWSCAS.1993.343099
Regular:

In this paper, we discuss a hardware cache coherency scheme for shared memory multiprocessors. The scheme consists of a cache coherency protocol and a hardware scheme for cache coherency. Use of... View More

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