IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 9 ns 16 Mb CMOS SRAM with offset reduced current sense amplifier

Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '93

Author(s): Seno, K. ; Knorpp, K. ; Shu, L.-L. ; Miyaji, F. ; Sasaki, M. ; Takeda, M. ; Yokoyama, T. ; Fujita, K. ; Kimura, T. ; Tomo, Y. ; Chuang, P. ; Kobayashi, K.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1993
Conference Location: San Francisco, CA, USA, USA
Conference Date: 24 February 1993
Page(s): 248 - 249
ISBN (Paper): 0-7803-0987-1
DOI: 10.1109/ISSCC.1993.280028
Regular:

A 4-Mb*4 SRAM (static random access memory) with a 9-ns access time that uses a 0.35- mu m CMOS process with KrF excimer laser lithography is descibed. The 9-ns access time is achieved by using a... View More

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